Design Verification Manager

Role Overview

Directs and manages a team of design verification engineers responsible for IP and SoC design verification. Deploys and manages leading silicon design verification processes, procedures, verification tools, and technologies based on latest best industry practices.

What You Will Do

Works with design, microarchitecture, and post-silicon validation teams to identify design bugs and improve overall microarchitecture. Collaborates with program leaders on the verification delivery and regression metrics against milestone requirements.

Why It Might Be a Fit

Responsible for enabling teams to execute through clear goal setting, facilitating work, maintaining accountability, applying differentiated performance management, and driving team results.

Requirements

• BS, MS or PhD in Electrical or Computer Science Engineering or related field
• 15+ years of technical experience in Pre Silicon Validation/Verification
• OVM/UVM, System Verilog, constrained random verification methodologies
• Design Verification with developing, maintaining, and executing complex IPs and/or SOCs
• Scripting experience with TCL/PERL/Python etc.
• Formal verification experience
• Experience in either Ethernet / PCIe / MACSEC / IPSEC protocols & FPGA architecture or FPGA prototyping
• Experience in either SME/team Manage or Technical Lead