Staff FPGA Design Engineer for a well-funded AI + semiconductor startup to help reinvent how chips are designed using agentic AI and machine-learning-driven EDA workflows.
Requirements
- 10–15 years of experience in RTL design and/or verification
- Master’s degree in Electrical Engineering, Computer Engineering, or Computer Science
- Deep experience with Xilinx (Vivado, Vitis) and/or Intel/Altera (Quartus) FPGA ecosystems
- Strong knowledge of AXI, PCIe, DDR, Ethernet, SPI, I2C, NoC, or similar protocols
- Proficiency in SystemVerilog, plus Python and TCL for tooling and automation
Benefits
- Competitive compensation
- Real equity in a deeply technical startup