Design Engineer will use physical design expertise to implement challenging designs in 2nm/3nm/5nm technology nodes, with hands-on experience in netlist->gds implementation, floorplanning, place and route, STA, and physical verification.
Requirements
- MSEE/MSCS 6+ years (BSEE/BSCS 8+ years)
- Expertise in Cadence Innovus/Atop physical design tools
- Experience on Calibre LVS/DRC
- Strong TCL/Python scripting knowledge
- Good debug skill and ability to work around issues
Benefits
- Medical, dental and vision plans
- 401(K) participation with company matching
- Employee Stock Purchase Program (ESPP)
- Employee Assistance Program (EAP)
- Company paid holidays
- Paid sick leave
- Paid vacation time