We are seeking a Lead Verification Engineer to apply machine learning techniques to traditional pre-silicon functional verification methodologies and develop agentic AI solutions to accelerate the design verification process.
Requirements
- Bachelor's or master's degree in electrical engineering, Computer Engineering, or related field.
- Proven expertise of more than 3-6 years in at least one of the pre-silicon ASIC verification methodologies such as Formal, SV/UVM and/or OVM.
- Advanced skills in debugging pre-silicon verification failures using waveform viewers and simulation analysis tools.
- Hands-on experience with industry standard EDA tools (e.g., Jasper, Xcelium, IMC).
- Strong programming skills in Verilog, System Verilog and Python
- Excellent communication skills and the ability to thrive in a team-oriented environment.
- Self-motivated, with a proactive approach to problem solving, continuous learning, and innovation.
Benefits
- Employee-friendly policies focus on physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success
- Multiple avenues of learning and development available for employees
- Unique 'One Cadence – One Team' culture promotes collaboration within and across teams to ensure customer success
- Work with a diverse team of passionate, dedicated, and talented individuals
- Opportunity to work on cutting-edge technology in an environment that encourages creativity, innovation, and making an impact
