Principal Software Engineer ( Verification )

Cadence is seeking a Principal Software Engineer (Verification) to design and develop Verification IP (VIP) using C/C++. The ideal candidate will have experience in functional verification using SV/UVM, strong debugging skills, and knowledge of digital electronics and programming fundamentals.

Requirements

• 8 – 11 years of work experience or equivalent relevant experience
• BE/BTech/ME/MS/MTech in Electrical/Electronic or equivalent
• Proficiency in functional verification using SV/UVM
• Strong debugging skills
• Strong Digital Electronics and Programming fundamentals
• Hands-on knowledge of C/C++/Scripting
• Working experience on MIPI
• Prior VIP usage and development experience
• Self-motivated individuals with strong analytical and communication skills

Benefits

• Multiple avenues of learning and development available for employees
• Diverse team of passionate, dedicated, and talented individuals
• Employee-friendly policies focus on physical and mental well-being
• Career development and opportunities for learning
• Celebrating success in recognition of specific needs of the employees