Sr Principal Design Engineer

Design Verification role for IP development team. Develop UVM testbench to verify Serial and Interface Design IPs, and potentially participate in Formal verification and Emulation qualification. Must have strong problem-solving skills and excellent communication skills.

Requirements

• B. Tech/M.Tech with 10+ years of relevant experience
• Strong problem-solving skills
• Excellent verbal and written communications skills
• Ability to establish a close working relationship with both customer peers and management

Benefits

• Multiple avenues of learning and development
• Employee-friendly policies
• One Cadence – One Team