ASIC Design Verification Engineer - 7+ yrs

Role Overview

The Common Hardware Group (CHG) delivers silicon, optics, and hardware platforms for Cisco's core Switching, Routing, and Wireless products. The team crafts networking hardware for Enterprises and Service Providers, the Public Sector, and Non-Profit Organizations across the world. The ASIC Design Verification Engineer will contribute to developing Cisco’s progressive data center by crafting industry-leading sophisticated chips.

What You Will Do

Develop DV infrastructure from scratch, maintain and improve existing DV environments, develop test plans and tests for qualifying design at block, cluster and higher-level environments, ensure complete verification coverage, and lead all aspects of and manage the ASIC bring-up process.

Why It Might Be a Fit

The ideal candidate will have 7+ years of related ASIC design verification experience, proficient in ASIC verification using UVM/System Verilog, and experience building test benches from scratch. The candidate should also be proficient in verifying sophisticated blocks, clusters, and top-level for ASIC.

Requirements

• Bachelor’s Degree or equivalent experience in EE, CE, or other related field
• 7+ years of related ASIC design verification experience
• Proficient in ASIC verification using UVM/System Verilog
• Proficient in verifying sophisticated blocks, clusters, and top-level for ASIC
• Experience building test benches from scratch, hands on experience with System Verilog constraints, structures, and classes