We are seeking a Mid-Level FPGA Engineer to join our team and contribute to the development and evolution of our Open RAN Radio Unit (RU) platform.
Requirements
- 3–6 years of experience in FPGA design and development.
- Strong understanding of digital signal processing (DSP) concepts and their hardware implementation.
- Solid knowledge of compute architectures and interest in AI/ML acceleration on FPGA.
Benefits
- Work on new technology that will make a significant impact on global infrastructure
- Ability to learn, develop, and advance within a flexible environment
- Collaborate with smart, passionate, and helpful co-workers
- Celebrate progress company-wide