IP Logic Design Engineer

The IP Logic Design Engineer role involves designing, developing, and implementing advanced Digital IO Controllers for next-generation data center and AI chips, with a focus on high speed IOs and coherency mechanisms.

Requirements

• Bachelor of Engineering in engineering
• Minimum 8-12+ years of experience
• Master of Engineering with 7-11+ years of relevant experience
• Digital design
• System Verilog
• RTL Design
• FE RTL2Netlist methodology flows
• STA
• Formal Equivalence

Benefits

• Generous Paid Time Off
• 401k Matching
• Retirement Plan
• Visa Sponsorship
• Four Day Work Week
• Generous Parental Leave
• Tuition Reimbursement
• Relocation Assistance