Hardware & Silicon Validation Principal Engineer

Role Overview

The Custom Cloud Solutions (CCS) Hardware Validation Group is responsible for ensuring the quality, reliability, and performance of next generation data center ASIC and SoC products. The team owns end to end hardware validation, working across the product lifecycle from early silicon bring up through system level qualification.

What You Will Do

Lead SI and PI analysis for high-speed digital interfaces, perform pre-layout and post-layout signal integrity analysis, design and analyze power distribution networks, and support high-speed interfaces such as DDR4/DDR5, HBM, PCIe Gen4/Gen5/Gen6, and Ethernet (NRZ and PAM4).

Why It Might Be a Fit

The successful candidate will play a critical role in ensuring robust signal and power performance across silicon, package, PCB, and system levels for next-generation products. The team is seeking an experienced Signal Integrity / Power Integrity (SI/PI) Engineer to drive the design, analysis, and validation of high-speed electronic systems.

Requirements

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15 years of related professional experience OR Master's degree in Computer Science, Electrical Engineering or related fields with 5-10 years of experience
• Proven record of technical leadership and ownership across multiple product generations, driving SI/PI excellence from early architecture through production
• Deep expertise in high-speed signal integrity analysis and design, including transmission line theory, channel modeling, and loss/jitter/noise mechanisms
• Extensive hands-on experience with advanced high-speed interfaces, such as DDR4 / DDR5 / LPDDR, HBM, PCIe Gen4 / Gen5 / Gen6, Ethernet (25G/50G/100G+ NRZ and PAM4 SerDes), high-speed chip-to-chip links
• Strong understanding of package, PCB, and connector effects on end-to-end channel performance
• Expertise in pre-layout and post-layout SI simulations, timing margin analysis, eye-diagram analysis, jitter decomposition, and compliance validation
• Deep knowledge of power distribution network (PDN) design, including on-die, package, and board-level power delivery
• Expertise in AC and transient PI analysis, impedance target formulation, decoupling strategies, VR design, and noise mitigation
• Practical experience analyzing and resolving simultaneous switching noise (SSN), ground bounce, and rail collapse issues
• Expert-level proficiency with industry-standard SI/PI tools, such as Cadence Sigrity (PowerSI, SystemSI, OptimizePI), Siemens HyperLynx, Keysight ADS / EMPro, Ansys HFSS / SIwave, Equivalent extraction and EM simulation tools
• Experience collaborating with memory, SerDes, PHY, silicon, packaging, thermal, mechanical, and validation teams to resolve cross-domain issues
• Hands-on experience supporting board bring-up, lab debug, and post-silicon validation, correlating simulation results with lab measurements
• Ability to act as a technical authority and decision maker for SI/PI architecture and design trade-offs across programs
• Strong communication skills, capable of clearly presenting technical risks, trade-offs, and recommendations to engineering leadership and executive stakeholders

Benefits

• Employee stock purchase plan with a 2-year look back
• Family support programs to help balance work and home life
• Robust mental health resources to prioritize emotional well-being
• Recognition and service awards to celebrate contributions and milestones