Senior Staff RTL Design /Verification

Role Overview

Join Marvell's DCE (Data Cloud Engineering) team as a senior staff engineer to develop cutting-edge silicon products for the semiconductor industry. The team is responsible for creating innovative chips and working in a highly professional environment.

What You Will Do

Responsible for major IP developments in the CnM, dealing with complex issues, and ensuring they meet functional, performance, power, and quality requirements. Continues engagement with SW/FW and Architecture teams, driving innovative solutions for different design and micro-arch challenges.

Why It Might Be a Fit

We're looking for a talented senior staff engineer with 6+ years of hands-on experience in RTL frontend design or verification, and a strong background in SystemVerilog and UVM methodology.

Requirements

• B.Sc. or M.Sc. in Electrical/Computer Engineering
• 6+ years hands-on experience in RTL frontend design or verification
• Proven hands-on experience and deep understanding of IP developments, micro-architecture, and digital logic
• Hands-on experience and knowledge in CDC/RDC—advantage
• Strong background in SystemVerilog and UVM methodology—advantage
• Vast background and knowledge in system-level aspects—advantage
• Strong problem-solving and decision-making skills, with the ability to prioritize and drive projects forward.
• Excellent communication skills, with a passion for mentoring and developing talent

Benefits

• Competitive compensation
• Great benefits
• Workstyle within an environment of shared collaboration, transparency, and inclusivity
• Tools and resources to succeed in doing work that matters
• Opportunities for growth and development