SR RTL DESIGN

We are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products.

Requirements

• Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows.
• Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications.
• Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR.
• Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals.
• Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk.

Benefits

• Medical, dental, and vision plans
• Paid time-off program
• Paid holidays
• Paid family leave