ASIC Digital Design, Principal Engineer

At Synopsys, we are looking for an experienced ASIC Digital Design, Principal Engineer to lead the design and verification of complex ASIC blocks and systems. The ideal candidate will have a strong background in RTL design, using industry-standard HDLs, and proficiency in using industry-standard EDA tools and methodologies. The successful candidate will drive innovation in ASIC design, contribute to the development of cutting-edge technology, and ensure the delivery of high-performance, reliable, and power-efficient ASICs that meet customer requirements and industry standards.

Requirements

• Extensive experience in ASIC digital design and verification
• Strong background in RTL design, using industry-standard HDLs
• Proficiency in using industry-standard EDA tools and methodologies
• Deep understanding of High-Performance Interface IP protocols and their implementation in ASIC designs
• Broad knowledge of the full digital ASIC and IP development flow
• Experience with power analysis and RTL level power optimization techniques
• Familiarity with verification languages and methodologies
• Strong analytical and problem-solving skills
• Excellent communication skills

Benefits

• Comprehensive range of health, wellness, and financial benefits