Senior Yield Enhancement Engineer

Role Overview

As a Senior Yield Enhancement Engineer, you will work independently with cross-departmental teams to transfer advanced semiconductor technology from Taiwan to overseas fabs, ensuring a successful ramp-up. You will be responsible for product yield improvement and meeting all customer requirements.

What You Will Do

Define an aggressive defect reduction roadmap, identify potential yield-limiting defect sources, and collaborate with internal departments to optimize manufacturing processes. Utilize metrology tools to monitor and detect integrated and process tool shifts in a high-volume advanced semiconductor manufacturing fab.

Why It Might Be a Fit

This role requires a strong sense of reliability and enthusiasm, with an attitude that embodies TSMC's core values – Integrity, Commitment, Innovation, and Customer Trust. You will have the opportunity to work on-site at our Phoenix Arizona facility and be a valued member of the TSMC family.

Requirements

• Master’s degree in Electrical Engineering, Material Science, Physics, or a related field
• 2 years of experience in a process, equipment or integration semiconductor engineering role
• 1 year of experience studying recipes in defect inspection metrologies (BF, DF, or EBI tool)
• 1 year of experience in defect review metrologies (SEM, CD-SEM, or TEM)
• Experience working in an ISO 4 (Class 10) or lower cleanroom environment
• Experience in semiconductor physics, CMOS device operation, or advanced semiconductor manufacturing
• Experience with 2 of the following processes: LIT, ETC, WET, CVD, PVD, DIF, and CMP

Benefits

• Comprehensive and competitive benefits program
• Medical, dental, and vision plan offerings
• Income-protection programs
• 401(k)-retirement savings plan
• Competitive paid time-off programs
• Paid holidays