Senior Lab Validation Engineer

Role Overview

As a Senior Lab Validation Engineer, you will take a hands-on role to find the root cause of any customer quality concerns and develop corrective actions. You will collaborate with design, validation, and system engineering teams as needed.

What You Will Do

Directly root-cause failures to the circuit, package, firmware, or protocol-level interactions. Modify device firmware to test out engineering theories leading to potential fixes or production screens.

Why It Might Be a Fit

You will use advanced lab instrumentation to characterize and isolate failures, develop and run stress tests and margining experiments, and drive physical failure analysis to isolate and image defects.

Requirements

• Minimum of a Bachelor’s in Electrical Engineering
• Minimum of 5 years relevant experience of which 5 years’ is hands-on mixed high-speed lab experience
• Python programming
• Deep understanding of PCIe protocol (up through Gen6), retimer architecture, and SerDes signal integrity
• Hands-on experience debugging retimers and PCIe switches
• Strong background in NRZ/PAM4 architectures, investigating issues with jitter, CDR/PLL behavior, equalization, crosstalk, and power integrity
• Experience in post-silicon validation and bring-up of high-speed PHYs or retimers
• Solid problem-solving and analytical skills
• Strong written and verbal communication skills

Benefits

• Base salary range: $160,000 USD - $195,000 USD
• In-person presence required
• Unique opportunity to impact global operations directly