ASIC Verification Engineer

We are looking for an ASIC Verification Engineer to join our team in Sunnyvale, California. As part of our fast-paced chip design group, you will become an expert in building/validating high-speed ASICs. You will be exposed to the latest verification methodologies such as UVM and will enable complex feature verification suites.

Requirements

• Bachelor’s degree required, Master’s strongly desired in Electrical Engineering or Computer Science/Engineering with 3-4 years of experience
• Strong analytical/problem solving skills
• Strong coding skills in Verilog/System Verilog through courses and projects
• Experience in constrained-random verification with methodologies such as UVM is a strong plus
• Experience building test benches using SV/UVM is strongly desired

Benefits

• Health & Wellbeing
• Personal & Professional Development
• Unconditional Inclusion