The System On Chip Design & Validation Engineer will play an active role in the development lifecycle of SoC (ASIC & FPGA) and embedded software development. The role involves contributing to system design, verification simulation, and on-target validation, as well as working closely with a team of highly skilled professionals.
Requirements
- System On Chip (SoC) design and validation
- Embedded software development
- Hardware description languages (VHDL, Verilog, Systemverilog)
- Scripting languages (Python)
- Programming languages (C/C++)
- Commercial EDA tools (Mentor Graphics, Synopsys, Cadence, Xilinx, Altera)
- Synthesis, place & route, and static timing verification
- Embedded software development for on-chip processors
- C driver SW development
Benefits
- Competitive salary
- Benefits package
- Opportunities for career growth and development