CPU Power Management Microarchitect/RTL Engineer

This CPU Power Management Microarchitect/RTL Engineer role involves ownership of architectural development, RTL design, verification, and performance exploration. The role focuses on optimizing the power, performance, area, and timing of microarchitectural designs. Collaboration with multiple engineering teams is crucial for successful implementation.

Requirements

• Minimum BS and 3+ years of relevant industry experience
• Experience with microprocessor architecture
• Experience with logic design principles with timing and power implications
• Experience with Verilog or VHDL
• Experience with simulators and waveform debugging process

Benefits

• Comprehensive medical and dental coverage
• Retirement benefits
• Discounted products and free services
• Reimbursement for certain educational expenses (tuition)
• Discretionary bonuses or commission payments
• Relocation