Principal Engineer - Silicon Logical Design

Axelera AI is seeking a Silicon Logical Design Principal Engineer to drive technical leadership across our digital design organization. In this role, you will own and deliver organization-wide, multi-year technical goals for AI accelerator SoCs from specification through tape out.

Requirements

• Extensive experience in digital and logical design for complex SoCs with multiple successful tape outs
• Strong expertise in RTL and micro-architecture development (SystemVerilog and Verilog)
• Experience with large scale SoC integration including CPUs, accelerators, memory subsystems, and interconnects
• Solid understanding of performance, power, and area trade-offs in advanced process nodes
• Experience working closely with verification and physical design teams to achieve functional and timing closure
• Track record of delivering organization-wide, multi-year technical initiatives
• Demonstrated ability to influence technical direction without direct management authority
• Strong communication skills and the ability to operate at both strategic and hands-on technical levels

Benefits

• Attractive compensation package
• Pension plan
• Extensive employee insurances
• Option to get company shares