Senior ASIC Verification Engineer to our R&D site in Stockholm

Do you want to work with advanced ASIC development in the forefront of technology? We are now looking for a Senior ASIC Verification Engineer to further strengthen the AXIS ASIC development in Stockholm.

Requirements

• Bachelor's or Master's degree in electrical engineering, computer science, engineering physics or similar
• Proficient in software-driven verification, interconnect fabrics/protocols, and other essential SoC-level IP knowledge
• Experience with coverage-driven constrained random verification, SystemVerilog, and UVM
• Solid understanding of digital design concepts (RTL, FSMs, pipelines, clocking, resets)
• Programming skills in System Verilog, Python, C, C++, and SystemC
• Strong debugging, problem-solving, and communication skills

Benefits

• Company bonus
• Friday cake
• Wellness allowance
• Health insurance
• Own Axis bicycle