Sr Principal Product Engineer

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. The opportunity to work on cutting-edge technology in an environment that encourages you to be creative, innovative, and to make an impact. Cadence’s employee-friendly policies focus on the physical and mental well-being of employees, career development, providing opportunities for learning, and celebrating success in recognition of specific needs of the employees. The unique “One Cadence – One Team” culture promotes collaboration within and across teams to ensure customer success

Requirements

• 12+ years of experience in SoC verification, validation, or verification methodology
• Strong hands-on experience with SystemVerilog and UVM or embedded / bare metal environments
• Solid understanding of constrained-random verification and system-level test generation
• Experience debugging complex verification environments
• Strong programming or scripting skills (C/C++/Python or similar)
• Ability to work directly with engineering teams to solve difficult technical problems

Benefits

• Multiple avenues of learning and development available for employees to explore as per their specific requirement and interests
• Portable Stimulus is changing how system-level verification is done
• In this role you will work on real verification problems at scale, interacting with some of the most advanced verification teams in the industry and helping shape how hardware/software co-verification is done across simulation, emulation, and silicon