Principal Analog Layout Engineer

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact.

Requirements

• Develop block and macro level layouts including floor-planning, placement, routing and optimization.
• Carry out layout feasibility studies on various circuit designs in collaboration with senior analog designers.
• Write automation scripts for layout flow improvements including pcells.
• Conduct thorough verification checks such as DRC, ANT, LVS, PERC, EM, IR to ensure the final layout possesses the highest level of quality.
• Debug ESD violations reported by PERC and suggest solutions.
• Investigate new features within the layout tools and processes used for creating layouts with the aim of enhancing productivity.
• Mentor junior layout team members as applicable who may assist with some aspects of the overall layout implementation
• Provide regular status updates, participate in team meetings and share experiences with the rest of the group.

Benefits

• medical, dental, and vision plans
• participation in 401(K) (USA) & DCPP (Canada) with company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• company-paid holidays
• paid sick leave
• vacation time
• Paid Family Leave and other leaves of absence