Senior ASIC (Front End) Design Engineer

Ethernovia is fundamentally changing how cars of the future are built by unifying in-vehicle networks into an end-to-end Ethernet system. We are transforming automobiles' communication network to enable the autonomous driving, electrical vehicle (EV) and software defined revolutions. We bring together, accelerate, and unify the car's cameras/sensors, compute, and outside world to enable new advanced driver assistance features and services.

Requirements

• BS and/or MS in Electrical Engineering, Computer Science, or related field
• Minimum 10+ years of ASIC RTL design and/or architecture experience
• Proven track record with the development of complex SoCs
• Strong understanding of digital design fundamentals and methodologies
• In-depth knowledge of Verilog/System Verilog and simulation tools

Benefits

• Competitive base salary
• Flexible hours
• Medical, dental and vision insurance for employees
• Flexible vacation time to promote a healthy work-life balance