Senior Design Verification Engineer, Networking, Google Cloud

We're seeking a Senior Design Verification Engineer to join our Research and Development team. As a member of this team, you will be responsible for verifying digital designs, developing constrained-random test environments, and driving system testing to closure. You will collaborate with design and verification teams to manage the verification life-cycle and uncover bugs through corner-case testing.

Requirements

• Bachelor's degree in Electrical Engineering or equivalent practical experience.
• 8 years of experience verifying digital logic at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or Application-specific integrated circuit (ASICs).
• Experience with Central Processing Unit (CPU ) implementation, assembly language, or compute System on a Chip (SOC).
• Experience verifying digital systems using standard IP components/interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
• Experience creating and using verification components and environments in standard verification methodology.

Benefits

• Competitive salary
• Benefits package
• Opportunities for professional growth and development