Silicon Micro-architecture and RTL Lead , Google Cloud

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 10 years of experience in ASIC development with Verilog/SystemVerilog, Vhsic Hardware Description Language (VHDL).
• Experience in micro-architecture and design IPs and Subsystems.
• Experience in ASIC design verification, synthesis, timing/power analysis, and Design for Testing (DFT).