Silicon RTL Design Engineer, PhD, Early Career

We're seeking a Silicon RTL Design Engineer to drive the development of next-generation Tensor Processing Unit (TPU) technology that fuels Google's most demanding AI/ML applications. As a member of the Technical Infrastructure team, you will collaborate with hardware and software architects and designers to architect, model, analyze, define and design next-generation TPUs.

Requirements

• PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering, or a related technical field
• Experience in programming languages (e.g., C++, Python, Verilog), Synopsys, Cadence tools
• Experience with accelerator architectures and data center workloads
• 2 years of experience in Silicon engineering post PhD
• Experience with performance modeling tools
• Knowledge of arithmetic units, bus architectures, accelerators, or memory hierarchies
• Knowledge of high-performance and low-power design techniques