Hardware Validation and Debug Engineer - DDR

Graphcore is seeking a Validation and Debug engineer to work with Architecture, Silicon Engineering, Hardware Engineering and the Firmware team to help create and execute the bring-up and debug of our cutting-edge system platforms.

Requirements

• Perform Validation and Debug for new hardware platforms.
• Debug PCB, power, signal integrity, and interface issues.
• Validate and debug high-speed memory interfaces and slow speed interfaces.
• Support LPDDR5-9600 initialization, training, timing optimization, margin analysis, and stability validation.
• Analyse DDR timing margins, signal integrity, eye diagrams, and training behaviour.
• Identify root causes and drive corrective actions across hardware and firmware domains.
• Create bring-up documentation, test procedures, and debug reports.
• Use advanced lab instrumentation including high-bandwidth oscilloscopes, BERT systems, VNA/TDR equipment.

Benefits

• Competitive salary
• Competitive benefits package
• Equal opportunities process
• Flexible approach to interview
• Reasonable adjustments for interview