Staff Digital Design Engineer - CPU Architecture & RISC-V

Innatera is a rapidly growing Dutch semiconductor company that develops ultra-efficient neuromorphic processors for AI at the edge. We're looking for a Staff Digital Design Engineer to take technical ownership of RISC-V-based CPU architecture and subsystem integration in our next-generation neuromorphic SoCs.

Requirements

• 7+ years of experience in digital design, with a strong focus on CPU architecture and micro-architecture development
• Demonstrable experience in designing and implementing RISC-V based CPU cores
• Deep understanding of CPU pipeline stages, memory hierarchies, interrupt handling, and bus interfaces related to CPU design
• Expertise in RTL coding (Verilog/System Verilog) and debugging for complex digital modules, particularly CPU designs
• Strong knowledge of SoC architecture and subsystem integration, specifically concerning CPU integration
• Proven experience in front-end design tasks for CPU cores, including synthesis, STA, and formal equivalence checking
• Solid understanding of digital verification methodologies and working collaboratively with verification teams, with a focus on CPU verification
• Familiarity with common communication protocols (e.g., AMBA AXI/AHB) relevant to CPU-to-system interfaces

Benefits

• Competitive salary
• Pension plan
• Ambitious team with the freedom to innovate
• A flexible working environment (work-from-home policy, flexible working hours, advantageous holidays scheme)
• An inclusive company culture that embraces open communication, diversity and supports holistic personal development
• Compensation for commuting to the office, fruits, drinks and snacks in the office