Senior ASIC Design Verification Engineer

We are seeking a Senior ASIC Design Verification Engineer to join our team at Micron Technology in Minneapolis, MN. The successful candidate will have a key role in developing advanced verification components for sophisticated SOC designs, ensuring on-time delivery with outstanding quality. The ideal candidate will have experience with UVM methodologies, SystemVerilog, and Python, and excellent problem-solving and communication skills.

Requirements

• ASIC/FPGA design verification experience with UVM methodologies
• Develop and maintain UVM-based SystemVerilog verification environments
• Build and enhance Python-based testbenches and simulation infrastructure
• Define and execute block and system-level verification plans
• Debug complex functional and integration issues in close collaboration with design teams
• Drive coverage closure and continuously improve verification quality metrics
• Explore and adopt AI-assisted techniques and tools to improve verification productivity and debug efficiency

Benefits

• choice of medical, dental and vision plans
• benefit programs that help protect income if unable to work due to illness or injury
• paid family leave
• robust paid time-off program
• paid holidays