Senior Design Verification Engineer

Senior Design Verification Engineer responsible for full-chip functional verification on Micron’s non-volatile memory design projects, developing verification plans, and collaborating with digital design teams.

Requirements

• Mtech degree in Electrical Engineering or Btech with 2 years’ experience required.
• Design experience of 2+ years is desirable.
• 0- 7 of experience developing verification collateral in Verilog, System Verilog and UVM required.
• UVM Proficiency is desired.
• Prior work experience with complex coverage driven random constraint UVM environment desired.
• Putting together complex UVM environments from scratch is a requirement.
• Good knowledge on circuit design, digital logic, and logic verification methodology required.
• Understanding on Verilog RTL coding, SystemVerilog object-oriented language required.
• Good knowledge on programming language such as C++, and scripting language like TCL and PERL required.
• Knowledge of Non-volatile memory design is highly desired.
• Experience with mixed-mode design and validation desired.
• Strong communication skills both written and verbal required.
• Strong interpersonal skills and maintain positive relationships required.
• Ambitious and goal oriented desired.
• Collaborate effectively in a dynamic team environment required.

Benefits

• Equal opportunity employer
• Accommodations for qualified applicants
• No recruitment fees or unlawful payment required
• No child labor