We are looking for a Senior Design Engineer to work on the architecture and design of our high-speed coherent interconnects. The successful candidate will collaborate with architects, software engineers, and circuit designers to deliver a leading high-speed coherent interconnect.
Requirements
- BS or equivalent experience in Electrical Engineering or Computer Engineer or related degree required
- 6+ years or relevant design experience
- Knowledge of industry standard interconnect protocols like PCIE, CXL, AXI, CHI
- Understanding or experience with Link layer stacks including Data link layer and Physical layer
- Experience with physical layer of interconnects such as Memory (DDR, LPDDR etc..), PCIE, SerDes
- Experience and knowledge in architecture, RTL design, performance analysis and power optimization
- Strong working knowledge of Verilog or System Verilog
- Good communication skills and interpersonal skills are required
Benefits
- Comprehensive benefits package
- Equity
- Highly competitive salaries