Sr Principal ASIC / RTL Design Engineer

onsemi is seeking a Senior Principal Digital Design Engineer to join our growing team in Bengaluru, India. The candidate will work on digital design architecture, digital RTL, low power design, synthesis and timing analysis, and Physical Design interface using state of the art RTL2GDS flows for IPs and full chip design.

Requirements

• Perform trade-off analysis between different architecture options
• Perform benchmarking of platform components
• Ownership of defining and deploying platform front end tool flow
• Implement micro-architecture to RTL implementation with the refining of features requirements throughout the design process
• Work with methodology development teams to establish, streamline and enhance new and existing development methods, coding process and integration flows