Staff Verification Engineer

We are seeking an experienced ASIC Verification Engineer to join our dynamic team. As a verification engineer, you will play a crucial role in ensuring the quality and reliability of our cutting-edge semiconductor designs.

Requirements

• Develop and execute comprehensive verification plans.
• Apply standard ASIC verification techniques, including test planning, testbench creation, code and functional coverage, directed and random stimulus generation, and assertions.
• Create and enhance testbenches using SystemVerilog (OVM/UVM) or other standard testbench languages.
• Implement reusable Verification IP (VIP) components.
• Collaborate with third-party VIP providers.
• Demonstrate a solid understanding of ASIC design and verification methodologies.
• Apply object-oriented programming principles effectively.
• Implement constraint random verification methodology.
• Work effectively with internal teams and external customers.
• Strong written and verbal communication skills.

Benefits

• Health insurance
• Retirement plan
• Paid time off
• Employee assistance program
• Life insurance