Join Qualinx, a startup revolutionizing radio chip technology, as a Team Lead Digital Verification Engineer. Contribute to the growth and success of a groundbreaking solution. Thrive in a dynamic environment with high standards and self-improvement.
Requirements
- Bachelor's degree or higher in Electrical Engineering
- 10+ years of experience as an ASIC Verification Engineer
- A couple of years of experience as a team lead
- Proficiency with EDA tools and design languages including Verilog
- Experience with standard EDA tools like Candence and Mentor
- Experience in designing complex mixed-signal products containing analog building blocks and microcontrollers
- Experience with RTL and ultra-low-power designs
- Strong programming and scripting skills: MATLAB, C/C++, Tcl
- Experience in setting up Power Distribution architecture, power intent specification and validation methodology
- Strong knowledge of clock domain crossing (CDC) techniques
- Understanding of digital design flow including RTL simulation, logic synthesis, timing constraints, timing closure, STA, back annotation of parasitics, gate level simulation
- Understanding of ASIC test methodology such as scan insertion, memory BIST and test pattern generation
- Strong analytical, problem-solving skills
Benefits
- Stock Appreciation Rights
- Visa Sponsorship
- Retirement Plan (2% of monthly base salary)
- 25 vacation days based on a 40-hour workweek
- Modern office with necessary equipment