We are seeking a highly skilled Staff Digital Design Engineer with deep expertise in Digital Signal Processing (DSP) for wireless communication systems. You will contribute to the end-to-end development of advanced communication algorithms and their efficient RTL implementation targeting FPGA and ASIC platforms.
Requirements
- Master's or PhD degree in Electrical Engineering, Computer Engineering, or related field
- 3+ years of experience in DSP algorithm development and RTL design for wireless communication systems
- Expert level understanding of communication theory and signal processing algorithms
- Deep knowledge of wireless communication protocols and standards
- Expert proficiency in MATLAB/Simulink and C/C++ for algorithm modeling and simulation
- Knowledgeable proficiency in Verilog, VHDL, or SystemVerilog for RTL design
- Extensive experience with FPGA development tools and/or ASIC design flows
- Experience with RTL verification methodologies
- Experience with digital predistortion, crest-factor reduction, or PA linearization techniques
- Knowledge of HW/SW co-design, firmware integration, and modem L1/L2 development
- Experience with high-level synthesis tools
- Experience with power optimization techniques for embedded systems
- Track record of patents or publications in signal processing or wireless communications
- Experience running synthesis, place-and-route, and timing closure activities using industry-standard EDA tools