Sr. Verification Engineer - Mixed-Signal ICs

The Sr. Verification Engineer is responsible for developing and implementing verification plans for mixed-signal integrated circuit blocks and systems. The role includes technical leadership, mentoring, and supervision of junior verification engineers.

Requirements

• 8+ years of industry experience in integrated circuit design verification
• B.S. or M.S. in Electrical or Computer Engineering
• Strong analytical, synthesis and problem solving skills
• Proficiency in SystemVerilog, UVM, Verilog/VHDL, scripting languages, and industry leading EDA verification tools

Benefits

• Generous Paid Time Off
• 401k Matching
• Retirement Plan
• Health Insurance