Principal FPGA / RTL Design Engineer - Signal Processing

Silvus Technologies is seeking a Principal FPGA / RTL Design Engineer to join their FPGA Engineering team. This role involves contributing to all phases of the research and development process, from concept to field deployment, focusing on signal processing algorithms for their wireless networking products. The position offers a challenging environment at a fast-growing company focused on connecting people and keeping them safe.

Requirements

• Bachelor of Science degree in Electrical Engineering, Computer Science, or related field
• 10+ years of demonstrated experience in RTL design and FPGA implementation
• 8+ years of experience with fixed-point binary arithmetic and DSP designs
• Deep knowledge of RTL design fundamentals using Verilog and System-Verilog
• Proven expertise working with front-end RTL design tools, FPGA synthesis, timing closure, multiple clock-domain/high-utilization FPGA designs
• U.S. Citizen or Permanent Resident status