Analog Layout, Staff Engineer
SynopsysBengaluru, Karnataka, India
Posted March 9, 2026
Full Time
About the Company
Synopsys is a global leader in electronic design automation (EDA), chip design, verification, and IP integration.
Job Description
We are hiring a Staff Engineer to lead the design and development of cutting-edge DDR/HBM PHY layout IPs for next-generation technologies. The ideal candidate has a strong foundation in CMOS, FinFET, and GAA process technologies at 7nm and below, and 5+ years of relevant experience in layout design.
Requirements
- 5+ years of relevant experience in layout design for CMOS, FinFET, GAA process technologies (7nm and below)
- B.Tech/M.Tech degree in Electrical Engineering, Electronics, or related field
- Expertise in layout matching techniques, ESD, latch-up, PERC, EMIR, DFM, LEF generation, bond-pad layout, IO frame and pitch requirements
- Strong understanding of floorplan techniques and deep submicron effects
Benefits
- Comprehensive range of health, wellness, and financial benefits
- Total rewards include both monetary and non-monetary offerings