Senior ASIC Digital Design Engineer position at Synopsys in Markham, Canada. Design and verify ASIC, FPGA, and firmware for high-speed mixed-signal circuits.
Requirements
- BSEE with 2 years of digital design and verification experience
- MSEE with 0 years of digital design and verification industry experience
- Expertise in ASIC design, synthesis, and clock domain crossing (CDC)
- Hands-on experience writing complex testcases in Verilog and SystemVerilog
- Familiarity with code quality metrics and best practices in verification methodologies
- Ability to create system-level specifications for digital and analog domains
- Strong knowledge of high-speed digital and mixed-signal design principles
- Experience with asynchronous clock crossings and DFT (Design For Test) methodologies
Benefits
- Comprehensive health, wellness, and financial benefits
- Monetary and non-monetary rewards