Staff Engineer Design Verification
TenstorrentBengaluru, Karnataka, India
Posted February 10, 2026
Full Time
About the Company
Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency.
Job Description
Tenstorrent is seeking a highly skilled Design Verification Engineer to join our RISC-V CPU team. The role involves block-level verification of high-performance Cache and Coherence units, leading the development of sophisticated UVM environments, and ensuring the quality and reliability of our next-generation IP solutions.
Requirements
- Strong hands-on experience with SystemVerilog and UVM
- Experience building verification environments from the ground up
- Comfortable driving complex DV efforts independently
- Solid understanding of RTL verification, debugging, and coverage analysis
Benefits
- Highly competitive compensation package
- Benefits