IC Design Verification Engineer
WinMaxSan Jose, California, United States
Posted May 16, 2017
Full Time
About the Company
WinMax is a Woman and Minority-Owned Business Enterprise specializing in workforce solutions, staffing, consulting, and development services. With a focus on exceptional talent sourcing for industries like Technology, Biotechnology, and Manufacturing, WinMax offers personalized services, timely deliveries, and robust communication protocols. Their talented recruiting team and responsive candidate engagement set them apart, providing clients with skilled candidates and innovative solutions to achieve business goals.
Job Description
Establish and enhance IC design verification methodology for unit-level and SoC level simulation environments, architecting and implementing infrastructure and test-benches.
Requirements
- BSCS/BSEE degree or MSCS/MSEE degree
- 8 years of related experience or 6 years with advanced degree
- Experience building UVM based verification environments
- Knowledge of wired or wireless networking protocols
- Expert knowledge of HVLs: SystemVerilog/OVM/UVM
- Knowledge of assertion based methodologies
- Experience in establishing and managing coverage requirements
- Working knowledge of scripting in Perl, Python, Tcl, and C
- Experience with logic simulators and debug tools from Cadence, Synopsys, and Mentor