Staff Hardware Design Engineer (F/M)
ArterisKrakow, Lesser Poland Voivodeship, Poland
Posted January 14, 2026
230000 - 270000 PLN
Full Time
About the Company
Arteris is a global leader in system IP used in semiconductors to accelerate the creation of high-performance, power-efficient silicon.
Job Description
Design and develop advanced hardware components for ARTERIS IP products, ensuring their quality and timely delivery. As a senior engineer, you will be a key technical contributor in the development of highly configurable network-on-chip (NoC) solutions.
Requirements
- 8 to 12 years of experience in SoC/IP/NoC design
- Strong expertise in coherent and non-coherent communication protocols (AMBA, AXI, ACE, PCIe, CXL, CHI, or others)
- Excellent understanding of CPU architectures (ARM/RISC-V), cache systems, and memory coherence
- Deep experience with SoC/IP design flow (specification, architecture, RTL coding, verification, synthesis, DFT, timing and power constraints)
- Excellent complex problem-solving, communication, and team collaboration skills
- Advanced proficiency in Verilog/SystemVerilog and simulation/synthesis tools (Cadence/Synopsys/Mentor)
- Strong experience with SystemC, C++, Python, and scripting languages
- Ability to work independently and propose innovative solutions
- Fluent English (written and spoken)