Staff Hardware Design Engineer role at Arteris, designing and developing advanced hardware components for ARTERIS IP products, ensuring quality and timely delivery.
Requirements
- 8 to 12 years of experience in SoC/IP/NoC design
- Strong expertise in coherent and non-coherent communication protocols (AMBA, AXI, ACE, PCIe, CXL, CHI, or others)
- Excellent understanding of CPU architectures (ARM/RISC-V), cache systems, and memory coherence
- Deep experience with SoC/IP design flow (specification, architecture, RTL coding, verification, synthesis, DFT, timing and power constraints)
- Excellent complex problem-solving, communication, and team collaboration skills
- Advanced proficiency in Verilog/SystemVerilog and simulation/synthesis tools (Cadence/Synopsys/Mentor)
- Strong experience with SystemC, C++, Python, and scripting languages
- Ability to work independently and propose innovative solutions
- Fluent English (written and spoken)
Benefits
- Estimated Base Salary: 230 000 PLN to 270 000 PLN annually