Astera Labs is seeking a Principal Digital Design Engineer to architect and implement next-generation digital designs for high-performance AI connectivity solutions. The role offers the opportunity to work on cutting-edge technology at the forefront of AI infrastructure, taking ownership of critical design challenges in a fast-paced, collaborative environment.
Requirements
- Develop and implement complex digital blocks and subsystems
- Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features
- Drive designs to production, ensuring accountability for quality, schedule, and overall design success
- Collaborate with verification teams to develop test plans and achieve coverage closure
- Own third-party IP integration and block-level verification through sign-off
- Mentor junior engineers to develop their technical skills and expertise
- Actively contribute to the development and improvement of silicon development processes
- Drive design methodology improvements and CAD automation initiatives
Benefits
- Discretionary bonus
- Incentives
- Benefits