Astera Labs is seeking a Senior Principal Digital Design Engineer to drive the architecture and implementation of next-generation digital designs powering AI infrastructure connectivity.
Requirements
- Bachelor's degree in Electrical Engineering or equivalent
- 12+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
- Demonstrated expertise in architecture definition, micro-architecture development, RTL coding, synthesis, and timing closure
- Deep knowledge of at least one high-speed protocol: PCIe, CXL, Ethernet, DDR, or similar
- Production experience with advanced CMOS nodes (≤7nm)
- Proficiency with Cadence and/or Synopsys digital design flows
- Track record of delivering multiple high-performance designs to production
Benefits
- Discretionary bonus
- Incentives
- Benefits