Lead Digital Verification Engineer

Cadence Design Systems is seeking a highly motivated and experienced Lead Digital Verification Engineer to join their dynamic and growing team of engineers developing high-performance physical IP for industry-standard protocols. The successful candidate will be responsible for the verification of digital RTL and development of reusable verification components and environments.

Requirements

• Bachelor of Science in Electrical (EE)/Computer Engineering (CPE) or Computer Science (CSC)
• Understanding of verification architecture and methodologies
• Understanding of Metric Driven Verification
• Understanding of Universal Verification Methodologies
• Understanding of the identification, planning and creation of functional coverage and checks
• Understanding of System Verilog Assertions (SVAs)
• Understanding of digital design flow

Benefits

• Paid vacation and holidays
• Leave of absence programs
• Registered Retirement Savings Plan (RRSP)
• Tax Free Savings (TFSA) plan for post-tax investment savings
• Employee Stock Purchase Plan
• Group health coverage
• Employee and dependent Life insurance
• Short-term and long-term disability
• Global Travel Medical coverage
• Business Travel Accident Insurance
• Lifestyle Spending Account (LSA)