Principal Design Engineer

Cadence is seeking a Principal Design Engineer to join its Silicon Solutions Group (SSG) in Cork. The successful candidate will design state-of-the-art DDR memory controllers for various applications, working as part of an experienced Controller IP Team.

Requirements

• Architect solutions for the latest DDR controller features and customer requirements.
• Design RTL in a highly configurable and automated environment.
• Work in small project teams.
• Work across disciplines with Design Verification, Support, Delivery, Application Engineers, PHY design team, etc.
• Utilize Cadence’s Design Automation flow and IP development tools.
• Develop high speed circuits and low power features.
• Improve quality and efficiency and help refine development process for greater productivity of the team through automation and improved methods.
• Participate in an engineering team to advance our product.

Benefits

• Equal employment opportunity and employment equity throughout all levels of the organization.
• Strive to attract a qualified and diverse candidate pool and encourage diversity and inclusion in the workplace.