We are looking for a Principal Engineer, Physical Design to join our team at InnoPhase IoT. The successful candidate will be responsible for the entire SOC implementation and verification flow from RTL-to-GDS, including floorplan, place and route, CTS, STA, PV/EMIR/Noise/SigEM cleanup and signoff on lower power SoC.
Requirements
- Master's degree or above in electrical/computer science engineering with 10+ years of industry experience
- Strong experience in Power/Ground grids, Partitioning, Timing ECO implementation, and physical verification
- Netlist (or RTL)-GDS physical implementation experience
- In depth knowledge of major EDA tools/design flows
- Strong Cadence experience/background
- Experience with TSMC N22 or below technology
- Experience in chip integration and signoff
- Experience in Perl/TCL language programming
Benefits
- Work with a team of brilliant people with various backgrounds
- Celebrate successes and work smart
- Opportunities for learning and experience in different aspects of work
- Career opportunities across a wide range of locations, disciplines
- Cutting-edge products and solutions to customers