ASIC/SOC Micro-Architect and RTL Design Engineer

MatX is seeking silicon micro-architects and design engineers to join their growing team in developing vertically integrated full-stack solutions from silicon to systems for AI. They focus on building high-performance and sustainable GenAI solutions with focus on high-speed connectivity and key technologies. Responsibilities include designing and delivering functional and performance-accurate silicon.

Requirements

• Concept-to-silicon experience driving silicon design for subsystems and top-level functions with ASICs and SOCs from an architecture specification to production silicon.
• Experience with SystemVerilog, Python, C/C++, Bluespec and similar scripting and programming languages for chip design.
• Experience with testing your designs and working closely with verification teams towards performance and coverage closure goals.
• Hands-on experience with design synthesis, equivalence checking, design lint, clock-domain-crossing and related flows to take designs to high quality sign-off.

Benefits

• Heath & Wellness Company subsidized Health, Dental, Vision, and Life insurance
• Time To Recharge 4 weeks paid time off
• 12 company holidays
• 3 weeks remote/flexible work per year
• Support to Parents (parental leave, early exercise)
• Learning & Development $1,500 yearly
• Team Connection and quarterly off-sites
• Financial Wellbeing package
• Flexible Spending Accounts
• Commute On Us
• Remote Perks