Senior Verification Engineer

Verification Engineer will define verification architecture, implement verification environment, and simulate SOC designs using advanced verification methodologies.

Requirements

• Define overall verification strategies, methodologies, and simulation environment
• Work with RTL designers, system architects and block level verification engineers to develop top level verification requirements and test plans based on specifications.
• Develop, maintain and publish verification specifications.
• Analyze and debug simulation failures
• Generates code coverage and functional coverage report
• Run gate level simulation and debug them.
• Perform the constraint assertion-based verification