RTL & Co-design Engineer (junior)

We're looking for a RTL Engineer to design and implement key compute, memory, and interconnect components for our custom AI accelerator. You'll work closely with architecture, verification, physical design, and ML engineers to translate AI workloads into efficient hardware structures.

Requirements

• Produce clean, production-quality microarchitecture and RTL for major accelerator subsystems
• Contribute to architectural studies including performance modeling and feasibility analysis
• Collaborate with software, simulator, and compiler teams to ensure hardware/software co-design and workload fit
• Partner with DV and PD to ensure functional correctness, timing closure, area/power targets, and clean integration
• Build and review performance and functional models to validate design intent
• Participate in design reviews, documentation, and bring-up support across the full silicon lifecycle

Benefits

• Relocation Assistance